Beyond CMOS Computing: The Interconnect Challenge

November 29-30, 2017

The International High Performance Computing (HPC) community is moving towards the next frontier – achieving sustained exaflop (1018 operations per second) computing within the next decade. The HPC community is also adapting itself to the new definition of HPC as HPC has assumed a broader meaning, encompassing not only flops, but also the ability to efficiently manipulate vast quantities of data.

With the plateauing of Moore's Law, the U.S. HPC community now must look beyond traditional CMOS-based computing logic and the decades-old Von Neumann architecture to meet the rapid pace of innovation needed to satisfy the national computing goals and priorities. Novel technologies will need to be developed that are based on new kinds of nanoscale devices (photonic crystals, carbon nanotubes) and nanomaterials, information conduits other than the electron charge such as superposition of quantum states, superconducting computing, and new 3-D architectures integrating emerging processors and memory.

The goal of this workshop series is to explore common areas of interest among various stake holders to enable the supercomputers of the future. The inaugural Beyond CMOS Computing workshop was held in 2016 and focused on novel approaches that overcome the limitations of CMOS technology with the potential to enable paradigm shifts in the HPC realm (http://beyondcmos.ornl.gov/20). The 2016 workshop presented "state of the art" overview in four focus areas: nanomaterials, quantum computing, superconducting computing, and emerging processor and memory architectures. The 2017 Beyond CMOS Computing workshop will delve deeper into relevant interconnect technologies, data movement, and latency issues. We will discuss the challenges in system interconnects (quantum interconnects, optical interconnects, E-O interface, new materials for on-die interconnects) and benchmarks/metrics for energy, cost, and scalability.

Experts from federal agencies, national laboratories, industry, and academia will be invited to present talks. The workshop will conclude with a panel discussion to address questions such as (1) which technology is the main successor to silicon-based CMOS, (2) is it more likely that  multiple computing technologies will evolve as CMOS successor, (3) are there common metrics/benchmarks to describe these novel computing paradigms.

The workshop will be held at the Westin Annapolis hotel (http://www.westinannapolis.com).